In 2020 we started an exploratory project to build an Open Hardware FPGA based development platform on top of our laptop MNT Reform, whose motherboard, input devices, power system and case were already Open Hardware. MNT RKX7, which was funded by NLnet, took the shape of a module that can be plugged into the MNT Reform's motherboard instead of its regular i.MX8MQ processor.
In September 2022 we assembled and brought up the second revision of the module (D-2) and were able to run a full RISC-V Linux Xorg desktop on the new module, integrated in the MNT Reform laptop shell. We are using an AMD Xilinx Kintex-7 XC7K325T-FFG676 FPGA.
An FPGA (field programmable gate arrays) is a convenient tool for when you want to create a custom chip but don't want to manufacture the actual silicon for cost reasons, or you want to test your custom logic—written in a hardware definition language (HDL)—in a real world environment instead of just a simulation, before you manufacture a chip. Another benefit of using an FPGA instead of an ASIC is that you or the users of your product can upgrade the hardware with new features by updating the FPGAs bitstream file.
The FPGA chip contains a sea of logic gates that, once powered on, are connected according to the map in the bitstream. The FPGA then "becomes" the chip you want it to be. The only limitation is that the clock speed, for example for "soft" CPUs, is more limited than in a hard ASIC. In our tests I run RISC-V cores at 100 MHz in the FPGA, although I think that double that speed is possible.
Recently, the success of the open RISC-V instruction set architecture has spurred a lot of development in the realm of open source CPU cores, as well as toolkits that allow you to easily integrate these processors with peripheral logic blocks for interfacing with storage, displays, ethernet, USB and so on.
LiteX by Enjoy Digital is such a toolkit. It allowed me to put together a software defined, open source system-on-chip that can be loaded into the FPGA. The cache sizes, number and type of cores and FPU can all be configured. Besides RISC-V, there are even other architectures available, like the IBM OpenPower Microwatt core.
MNT Reform with RKX7 and Linux-on-LiteX-VexRiscV is a working prototype of a laptop that is open source to the logic level in its main processor core. HDL engineers, computer scientists and enthusiasts can use it to test drive the next generation of open system-on-chips in a fully working portable computer instead of just a circuit board sitting on the lab bench. More use cases are fast circuit level emulation of classic computer systems or building a highly secure laptop similar to the Precursor.
Enjoy Digital already helped us in 2021 by upstreaming initial support for RKX7 in litex-boards. From there, I fine-tuned the platform and target definitions and made some changes to get to a working desktop system. The main changes are concerning the Analogix eDP bridge and the display.
Linux-on-LiteX-VexRiscV includes a Python-based build process that you can use to generate the complete gateware (bitfile), BIOS, OpenSBI and even Linux via buildroot. For synthesizing and routing the gateware, you need either the free Vivado WebPack (enough for XC7K160T) or the commercial version (required for XC7K325T) and include its settings file before building. Alternatively, there is the experimental open source nextpnr-xilinx (untested).
LiteX doesn't currently have the ability to write to SPI flash. Because loading the bitstream via the JTAG programmer (Xilinx Platform Cable) takes a long time (~5-10 seconds), I needed a way to write the bitstream to the flash chip on RKX7 from within LiteX BIOS. I decided to re-use some code from a GitHub comment and add a function to copy the bitstream from an SD card to the flash chip. When it finally worked and I added the right speed settings to the bitstream generation, I was delighted to see the FPGA boot in under 1 second.
After loading the bitstream, the VexRiscV processor springs to life and executes the LiteX BIOS from on-chip memory. litedram code then calibrates the DDR3 memory and boots OpenSBI, the Linux Image and root file system from SD card. I added some code to toggle various resets on the MNT Reform motherboard in the LiteX BIOS, but later this can be moved to Linux as well.
With a 100MHz VexRiscV core, it takes around 30 seconds to arrive at a login prompt. The power consumption of the complete system running Xorg with 2 cores and full display brightness measured around 10 W. An active heatsink was not required.
MNT RKX7 support is included in LiteX. A pull request with the D-2 version changes is pending. Additional small patches to Linux and LiteX are included in the design repository.
You can either manufacture the module yourself based on our MNT RKX7 design sources, or procure modules through us. Due to the global chip shortage, we have to buy some of the components for the module on the secondary market—with fluctuating prices. We also make the modules built-to-order, so price and lead times depend on your order quantity. For details, please get in touch.