2021-08-09.log

chartreuseCan't wait for the better wifi antennas to arrive, but these cheap ebay ones that I had for a previous laptop aren't entirely useless. Though I think they're only designed for 2.4GHz00:00
mntmnvery possible00:05
mntmnbluerise: very good progress btw! i believe that breakthrough is not very far off...00:06
chartreuseLooking at the keyboard schematics it seems there's two switch's free in the matrix. Gives me an idea to maybe add a lid switch of some kind for entering standby00:09
chartreuseThough no pins directly free on the micro so it'd have to be something self contained that just connects two pins when closed, like maybe a reed relay or such00:10
chartreuseWonder if I could position one close enough to the lid magnets to go off when closed, but not just from the magnets in the base half00:10
mntmnyou could maybe solder to the back of the motherboard's LPC expansion port pins instead00:11
mntmna wire that is00:11
mntmn(saying this because it has free gpios)00:12
mntmnmessing with lpc is a bit more risky though00:12
mntmnchartreuse: but the biggest problem is that sleep/wake gets stuck pretty often. we need to solve that first00:12
mntmnchartreuse: https://source.mnt.re/reform/reform/-/issues/800:13
chartreuseI've only had an issue once where it woke but didn't reset the wifi correctly. But I haven't done it too much00:13
chartreuseI still might at least modify the controller so there is a sleep option in the circle menu that sends a suspend key event over the keyboard.00:13
chartreuseI'll take a look into suspend and see what I can find, I guess I have to just try it a bunch to see how it fails for myself00:16
mntmnyeah00:16
mntmnyou are using an nvme right?00:16
chartreuseI was liking the idea of putting it on the keyboard controller rather than the LPC because there is a keyboard scancode for suspend, and then userspace could handle it from there00:17
chartreuseYeah I've got an nvme as the boot drive now, though with the SD card providing the init rather than the eMMC right now00:17
mntmnchartreuse: ok makes sense!00:17
chartreuseOh the trackball has its own micro as well, maybe I could look into if a USB HID mouse can send a suspend event somehow, doubt it, plus the keyboard seems a better place00:21
ephasemntmn: What is the normal temperature of the SoM?00:24
mntmnephase: 50-60 degrees00:25
chartreuseIt takes a fairly long time to get up to that temperature, right now mines still at 30, but it got to 55C last night00:25
mntmnare you in a cool place? 00:27
ephasemntmn: ok I have 56 degres here while browsing and editing markdown file00:28
mntmnephase: that's pretty normal tthen00:28
mntmnthen00:28
ephaseok thanks00:28
chartreuseNot too much, it's around 20C here, guess I've just been doing very light usage at the moment. Yesterday was a bit warmer00:28
mntmnit tends to get hotter when charing or using the GPU a lot00:28
mntmncharging00:29
ephaseok00:32
ephasemine not charging actually00:32
ephasemntmn: I can use your MNT Reform from your presskit for my blog article?00:33
mntmnephase: yes, absolutely00:33
- chartreuse (QUIT: Ping timeout: 240 seconds) (~chartreus@199-7-158-226.eng.wind.ca)00:34
ephasemntmn: thanks, minea are not so good ^^00:34
ephasemntmn: without compiling xwayland gimp interface is messy00:53
mntmnephase: yes.00:56
mntmnephase: glFinish() patch is required for gtk2 apps00:56
mntmnephase: the next gen version of gimp uses gtk3 though.00:57
mntmn(2.99)00:57
ephaseyes I know, so Iuse convet instead :)01:03
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)01:16
ephaseGoning to sleep, good night01:30
mntmnn8n801:43
- ephase (QUIT: Quit: WeeChat 3.0.1) (~ephase@2a01:e0a:168:1211::885)01:53
- wagga (QUIT: Quit: Client closed) (~wagga@node-1w7jra22ildhv9tkri23jpmvy.ipv6.telus.net)02:42
- chartreuse (QUIT: Quit: leaving) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)02:44
- alex4nder (QUIT: Ping timeout: 245 seconds) (~alexander@172.56.42.59)03:27
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)06:22
+ alex4nder (~alexander@172.58.43.141)06:25
chartreuseMade a script to toggle the pulse output between headphones and speaker and bound that to Super+F6 in sway. 06:34
chartreuseThough now I'm looking at the schematic and I see that the jack detect is hooked up to the DAC and the headphone jack. So there should be a way of making it work automatically06:34
chartreuseIn the Wolfson DAC datasheet there's a register to have it automatically switch when the jack is inserted, though not sure if that'd play nicely with Pulse and also change the volume level to the headphone level06:35
- alex4nder (QUIT: *.net *.split) (~alexander@172.58.43.141)06:58
- chartreuse (QUIT: *.net *.split) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)06:58
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- Asmadeus (QUIT: *.net *.split) (~asmadeus@240b:13:8c80:d300:e:98c:8000:d300)06:58
+ alex4nder (~alexander@172.58.43.141)06:59
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)06:59
+ TadeusTaD (tadeustad@fulu.psifactor.pl)06:59
+ scops (~scopstchn@2001:470:69fc:105::8da)06:59
+ jryans (~jryans@2001:470:69fc:105::1d)06:59
+ emery (~quassel@2a03:3b40:fe:ab::1)06:59
+ Asmadeus (~asmadeus@240b:13:8c80:d300:e:98c:8000:d300)06:59
- tarxvf (QUIT: *.net *.split) (~tarxvf@mail.tarxvf.tech)07:01
- jackhill (QUIT: *.net *.split) (~jackhill@kalessin.dragonsnail.net)07:01
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- marex (QUIT: *.net *.split) (~marex@195.140.253.37)07:01
+ jackhill_ (~jackhill@kalessin.dragonsnail.net)07:01
+ marex_ (~marex@195.140.253.37)07:01
+ tarxvf_ (~tarxvf@mail.tarxvf.tech)07:01
+ skalk_ (~skalk@vond.sysret.de)07:01
- scops (QUIT: Ping timeout: 272 seconds) (~scopstchn@2001:470:69fc:105::8da)07:03
+ sknebel (~quassel@v22016013254630973.happysrv.de)07:03
- jryans (QUIT: Ping timeout: 272 seconds) (~jryans@2001:470:69fc:105::1d)07:03
+ reformer (~reformer@softboy.mntmn.com)07:07
- erlehmann (QUIT: Quit: Just say no, then the virus can not enter your body without your consent.) (~erle@dynamic-046-114-034-077.46.114.pool.telefonica.de)07:11
Asmadeuspulseaudio handles that pretty well afaik (both switch and different sound level)07:29
* swivel_ -> swivel07:32
+ cryptix (~cryptxxma@2001:470:69fc:105::94a)07:33
+ nio (~nio@2001:470:69fc:105::172d)07:33
+ scops (~scopstchn@2001:470:69fc:105::8da)07:40
chartreusePulse does it yeah, but I guess it'd be more how is the driver handling it and is it communicating it to linux. Because looking at the datasheet it seemed internal. 08:00
chartreuseThough I haven't looked at the driver source yet08:00
chartreuseSince right now it doesn't auto switch on the Reform08:01
* marex_ -> marex08:11
+ jryans (~jryans@2001:470:69fc:105::1d)08:34
+ indefini[m] (~indefinim@2001:470:69fc:105::1e2a)08:35
mntmnchartreuse: that is correct, the hardware support is there but i haven't investigated how to make the driver & pulse handle it. 10:20
+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)11:45
- alex4nder (QUIT: Ping timeout: 272 seconds) (~alexander@172.58.43.141)13:33
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+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)13:46
+ wagga (~wagga@node-1w7jra22ildhwu44kvuq39uhc.ipv6.telus.net)13:56
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+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)15:47
+ wiedi (~wiedi@37.228.191.159)16:05
- wiedi (QUIT: Read error: Connection reset by peer) (~wiedi@37.228.191.159)17:34
+ wiedi (~wiedi@37.228.191.159)18:18
+ alex4nde1 (~alexander@172.58.35.56)18:43
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- rasmus (PART: Disconnected: timeout during receiving) (~rasmus@c80-217-132-63.bredband.tele2.se)19:42
+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)19:43
+ erlehmann (~erle@dynamic-046-114-033-055.46.114.pool.telefonica.de)20:27
* jackhill_ -> jackhill20:40
bluerisesomething was still bogus on the MIPI eDP bridge, pulse width was wrong20:56
bluerisenow at least the colors look right20:56
bluerisestill black, eh20:56
mntmnoh, interesting... horiz pulse width in the display timings?20:57
blueriseyeah, the community thread had it wrong20:57
bluerise-       /* HSync pulse width 40 */20:57
bluerise-       sn65dsi86_write(dev, 0x2c, 0x28);20:57
bluerise-       /* VSync pulse width 4 */20:57
bluerise-       sn65dsi86_write(dev, 0x30, 0x04);20:57
bluerise+       /* HSync pulse width 80 */20:57
bluerise+       sn65dsi86_write(dev, 0x2c, 0x50);20:57
bluerise+       /* VSync pulse width 24 */20:57
bluerise+       sn65dsi86_write(dev, 0x30, 0x18);20:57
blueriseI should replace the hardcoded settings anyway20:57
blueriseat some point20:57
mntmnalright!20:58
bluerisebut for now it's more important to find out why it's still black / no MIPI packets20:58
mntmnwhat about tracing in the code if mipi packets are sent?20:58
mntmnin the dsi driver20:58
mntmnor actually that's probably only for some kind of auxiliary packets? i guess the engine should run without any active driver support20:59
mntmnthe hdmi stuff is not running at the same time, right?20:59
blueriseno HDMI stuff21:00
mntmnok21:00
mntmnmy guess is they never tested dcss+dsi in u-boot21:00
mntmnso there might be a tiny detail wrong21:00
mntmni mean, some we already found21:01
mntmni could try to bulk dump the relevant registers on a working booted system maybe and then compare 21:01
mntmnbut idk if it is a "wrong register values" or "wrong order of things" or "wrong clocks" problem21:02
bluerisecould be all of them ;)21:02
mntmntrue21:03
bluerisethat's why it's hard to turn one knob21:04
mntmnfor example, lcdif goes black if it is starved for like 1 second and does not recover21:04
mntmnbut dcss is probably different21:04
bluerisebecause you might actually turn a knob that makes it worse heh21:04
bluerisetoo many permutations21:04
mntmnyeah.21:04
mntmnwe would need to have some confirmation of things working or not at all points in the chain21:05
bluerisewell at least the display works ;)21:05
mntmnyes21:05
blueriseand the clk dump looks promising21:06
mntmnyes21:06
mntmncan you pastebin/gist a complete clk dump?21:09
mntmnbluerise: here's a register dump from the working systems' DTG (display timing generator) http://dump.mntmn.com/dcss_dtg.txt21:14
bluerisehttp://ix.io/3vuQ21:18
- rasmus (PART: Disconnected: closed) (~rasmus@c80-217-132-63.bredband.tele2.se)21:19
mntmnok, some interesting differences21:19
mntmnso, if i write your value 0xff005184 to 0x32e20000, nothing changes, but writing a zero there kills the display output (it stays at a single color)21:24
mntmn(on working linux system)21:25
bluerise'// LCDIF is not used, but has to be active or DCSS won't work'21:27
bluerisewhat does 'active' mean?21:27
blueriseclock?21:27
mntmnwell, i don't know in detail but if the dts node is disabled (i.e. not "okay") i wouldn't get display output on dcss in linux21:27
mntmncould be some clock or clock gating or power thing21:28
blueriseit's written twice21:28
bluerise        reg32_write(priv->addr + 0x20000, 0xff005084);21:28
blueriseone21:28
bluerise        reg32_write(priv->addr + 0x20000, 0xff005184);21:29
bluerisetwo21:29
bluerise        /*reg32_write(priv->addr + 0x20000, 0xff000484); */21:29
blueriseand one masked lol21:29
bluerisewonder what the diff is21:29
mntmnyes it's written twice21:31
mntmnbecause it is first turned off21:31
mntmnand then turned on21:31
mntmnthat's the 0x10021:31
mntmnthat's the GO flag for the display timing generator21:31
mntmnso they turn it off, make all the settings and then turn it on21:31
mntmnthe display timings in the register dump are the same as on my working system21:33
mntmni.e. the stuff that looks like 0457081f 001f0077 and so on21:33
mntmnthis is different: reg32_write(priv->addr + 0x20028, 0x000b000a);21:33
mntmnok that is really strange, because that is the context loader register21:42
mntmnthe first 16bits are single buffered line counts and the second 16bits are double buffered line counts21:43
mntmnthat's why on linux i have 0000044B21:43
mntmnthat's 1099, so at the end of the blank area of the 1080p screen i guess21:44
mntmn> Line Count in the raster table where the CTX_LD is triggered for loading context21:44
mntmnso it probably doesn't matter, it's just a very strange value (0xa / 0xb)21:44
mntmnwell ok it makes sense if that is a front porch or something21:45
technomancyis it possible that I have network-manager fighting with ... some other network thing? I've noticed that the wifi AP listing I get from nmtui is often completely different from the listing I get from whatever runs when I click "NET" in the top bar of sway21:48
mntmntechnomancy: yes, network-manager is not used by default21:56
mntmntechnomancy: instead we use connman21:56
mntmni mean, network-manager is not even installed by default21:56
technomancyhuh, I never heard of connman before today21:58
technomancymy dotfiles script must have brought in network-manager in order to get the tray icon thingy21:58
mntmnit's kind of more compact21:58
mntmnyou can of course switch everything to network manager but then you have to remove connman and change the waybar config to show some network manager UI instead21:59
technomancyI wonder if that's why my wifi has kept dropping out, if the two systems have been conflicting over the two21:59
mntmnyes, very possible21:59
technomancyI don't have any preference; I'll get rid of network-manager and see what happens with just connman21:59
mntmnbluerise: haha i found the "opacity" slider in dcss22:01
mntmnwhich explains the 0xff22:01
technomancyhm; so connman doesn't seem to be able to work with my mobile's USB tethering22:01
technomancy(but network-manager didn't either, on this machine)22:01
mntmntechnomancy: probably missing a kernel driver for that22:01
technomancybut for wifi only it seems fine22:01
technomancyI've never needed special drivers on any other machine for USB tethering, but maybe?22:02
mntmnthe reform kernel does not have all those drivers by default, i missed that one because it has a weird name, microsoft something something22:02
mntmnbluerise: ok so the 0xff in 0xff005184 is the alpha value of that channel22:03
mntmnbluerise: and 0x400 (active in linux, but not in that uboot thing) enables per pixel alpha instead of per channel alpha22:04
mntmnbluerise: those are interrupt coordinates. but they are turned off in u-boot. 0x32E20050:  03E70000 22:06
mntmnbluerise: i am concluding that the DTG setup part of DCSS should be OK.22:08
+ darth-cheney (~user@135.84.167.9)22:15
darth-cheneyyo, for whatever reason I don't seem to have the reform-migrate script on my system22:16
darth-cheney(the one described in 10.3 of the manual)22:16
darth-cheneyIs that because it shouldn't be used anymore?22:16
mntmndarth-cheney: maybe you have to use sudo22:17
mntmnshould be /usr/sbin/reform-migrate22:17
mntmnmemtool 0x32e1b060=1 makes everything tinted red.22:18
mntmnso those are color space registers22:18
darth-cheneymntmn: aha I see it there22:21
darth-cheneymanual says /sbin/reform-migrate22:21
darth-cheneyok sweet, I'm gonna see if I can boot from the internal22:21
bluerisemntmn: http://ix.io/3vvb22:23
mntmnbluerise: thanks22:24
mntmndarth-cheney: sorry, bug in the manual22:25
mntmnbluerise: i would like the respective 32bit values in 0x32e1b010, 0x32e1b020, 0x32e1b030, 0x32e1b040, 0x32e1b05022:27
mntmnbluerise: these are important for the display timing/blanking signals22:28
mntmnbluerise: they should be 0457081f, 0027081f, 00070003, 80200077, 045707f722:29
darth-cheneymntmn: no sweat dude22:29
bluerisehm, maybe the code is wrong then?22:30
bluerise        reg32_write(priv->addr + 0x1b010,22:30
bluerise                    (((priv->timings.vfront_porch.typ + priv->timings.vback_porch.typ + priv->timings.vsync_len.typ +22:30
bluerise                        priv->timings.vactive.typ -1) << 16) |22:30
bluerise                       (priv->timings.hfront_porch.typ + priv->timings.hback_porch.typ + priv->timings.hsync_len.typ +22:30
bluerise                        priv->timings.hactive.typ - 1)));22:30
mntmnbluerise: what is wrong? do you have other values?22:32
blueriseah wait sorry22:32
blueriseI looked at the DTG stuff22:32
bluerise1s22:32
mntmnok22:32
mntmnalso, the framebuffer address is in 0x32e180c022:33
mntmnin linux the address is 0xdf200000... and i can see the correct pixels there, which is fun22:33
bluerise0457081f, 004f081f, 001b0003, 80200077, 045707f722:33
mntmnbluerise: ok some slight differences there, let me check22:34
blueriseah, you got 40, I got 80 in the 0x20 one22:35
bluerise        reg32_write(priv->addr + 0x1b020,22:35
bluerise                    (((priv->timings.hsync_len.typ - 1) << 16) | priv->hpol << 31 | (priv->timings.hfront_porch.typ +22:35
bluerise                        priv->timings.hback_porch.typ + priv->timings.hsync_len.typ + priv->timings.hactive.typ -1)));22:35
bluerisemine writes hsync-len22:35
blueriseand yours has hfront/hback porch?22:35
mntmnlet me check the linux driver22:35
blueriseneed to check dcss code22:35
bluerisehehehe22:35
blueriseyes22:35
mntmnok i found the right file at least...22:38
mntmnhsync_start = vm->hfront_porch + vm->hback_porch + vm->hsync_len + vm->hactive - 1;22:39
mntmnhsync_end = vm->hsync_len - 1;22:39
bluerise        dcss_ss_write(ss, (phsync ? SYNC_POL : 0) |22:39
bluerise                      ((u32)hsync_end << SYNC_END_POS) | hsync_start,22:39
bluerise                      DCSS_SS_HSYNC);22:39
mntmnyeah22:39
bluerisebut wait, is my hsync_len then wrong?22:39
bluerise../../drm_modes.c:      vm->hsync_len = dmode->hsync_end - dmode->hsync_start;22:40
mntmnshould be 4022:40
mntmn0x2822:41
bluerisesure?22:41
mntmnthat's what's in my register at least ;) i can try to see what happens if i change it22:41
bluerise        .hsync_start = 1920 + 40,22:42
bluerise        .hsync_end = 1920 + 40 + 40,22:42
bluerise        .htotal = 1920 + 40 + 40 + 80,22:42
blueriseoh it really is 4022:42
bluerisevnd vsync_len is 422:42
mntmnalso your vsync len is 0x1c instead of 8?22:42
mntmnah yeah wait22:42
mntmnwhat's the 0007 vs 001b22:43
bluerisebut, isn't that just hback/hfront porch or so22:43
blueriseokokok, let's look at this22:44
bluerise        vm->hfront_porch = dmode->hsync_start - dmode->hdisplay;22:44
bluerise        vm->hsync_len = dmode->hsync_end - dmode->hsync_start;22:44
bluerise        vm->hback_porch = dmode->htotal - dmode->hsync_end;22:44
mntmnthe 0x30 is the vsync register22:44
mntmn0x20 the hsync22:44
bluerise40 is hfront porch then, 40 is hsync len, 80 is hback porch22:45
blueriseaahhhhh22:45
blueriseso *that* is flipped22:45
blueriseactually22:48
bluerisenow the video bar looks horrible22:48
mntmnhaha22:48
swivelACTION notes someone really has to replace all these magic numbers with symbolic constants like #defines using meaningful names ;)22:48
mntmnswivel: well that's vendor drivers for ya...22:49
mntmnthe one for linux is more cleaned up22:49
bluerisemntmn: didn't make it better, but I'm looking into it22:49
blueriseand now I need to play a round of OpenRA22:49
mntmnok22:49
mntmnmmmm OpenRA, good choice22:49
mntmnbluerise: last question, do you get color bars if you don't enable dtg in the end?22:50
mntmni mean when not doing that last 22:50
mntmnreg32_write(priv->addr + 0x20000, 0xff005184);22:51
mntmn(my guess is you still get color bars because it's probably independent)22:51
bluerisefound another typo22:51
blueriseth ecolour bars look crappy now btw22:51
bluerisewith the switch of back porch and sync len22:52
bluerisebut I found a typo in the sn65dsi86 code22:52
mntmnok22:52
blueriseah yes, the typo fixed the colour bars ok22:52
blueriseso that looks good now with colour bars22:53
mntmnoh!22:53
bluerisewithout it, black22:53
blueriseok let me give you the updated numbers22:53
mntmnand if you don't turn on dtg, still color bars (i would suspect yes)?22:53
bluerise0457081f 0027081f 00070003 80200077 045707f722:53
mntmnthese numbers are now exactly correct22:54
- darth-cheney (QUIT: Remote host closed the connection) (~user@135.84.167.9)22:58
mntmnregister 0x32e1c000 is fun, too... if you turn off bit 4 you can display only 1 frame and then stop by feeding it with bit 1... 22:58
mntmnbit 4 makes it do a continuous job. so the scaler needs to be on. they also turn it on in the u-boot driver.22:59
mntmnthe huge register blob with 0x1cxxx is the scaler configuration.22:59
mntmnfunky, dcss can do 8 bit per pixel, yuv, gpu and vpu detiling, all kinds of stuff. 23:07
bluerise32e1c000: 0000001023:11
bluerisewell, I see you're looking at the u-boot code, you can compare that I guess23:11
mntmnyeah that's ok23:24
mntmni think DCSS config is ok23:24
mntmnclocks are ok, the only difference, which i don't understand yet, is dsi_phy_ref23:25
mntmn23760000 vs 2407407523:25
mntmnboth are somewhere around 24mhz though23:26
mntmnthat's probably connected to my lower pixelclock i guess23:27
bluerisehm, don't think so, I think that's just set to 24M23:33
mntmnhm23:34
bluerise                                assigned-clocks = <&clk IMX8MQ_VIDEO_PLL1_REF_SEL>,23:34
bluerise                                                  <&clk IMX8MQ_VIDEO_PLL1_BYPASS>,23:34
bluerise                                                  <&clk IMX8MQ_CLK_DSI_PHY_REF>,23:34
bluerise                                                  <&clk IMX8MQ_VIDEO_PLL1>;23:34
bluerise                                assigned-clock-parents = <&clk IMX8MQ_CLK_25M>,23:34
bluerise                                                  <&clk IMX8MQ_VIDEO_PLL1>,23:34
bluerise                                                  <&clk IMX8MQ_VIDEO_PLL1_OUT>;23:34
bluerise                                assigned-clock-rates = <0>, <0>, <24000000>, <594000000>;23:34
blueriseand that's just the reference clock23:34
mntmnok weird23:34
blueriseSo I'd say I'm closer to 24M than you :D23:34
mntmnhaha23:34
mntmnbtw i didn't find anything that sets dsi_flags23:35
mntmnprobably the defaults are ok, but just some oddity.23:35
mntmnok so the nwl-dsi driver in u-boot does polling for completion (nwl_dsi_poll_for_completeion incl this typo)23:52
mntmnlinux uses init_completion23:53

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