2021-08-08.log

+ darth-cheney (~user@2603-7000-8d00-1f72-0000-0000-0000-1c80.res6.spectrum.com)00:04
mntmnephase: cool i am looking forward to it!!00:04
chartreuseI'll probably write a review at some point, but want to have some more time with it first. I'm already starting to get used to the keyboard layout, so I stop hitting alt instead of the spacebar and missing the offset A key and homerow00:06
chartreuseAlso the purple glow seems to have gone away since loosening the screws. So I'll either have to find some 0.5mm m2 washers or just put some blue threadlocker on the screws in their current tightness00:07
chartreuseThough the stuck pixel still exists, but seems to go away after maybe 10m of use00:07
technomancythe A key was really difficult for me; I ended up removing ctrl and remapping the key between ctrl and A to be the new ctrl00:07
technomancysame with shift and Z00:08
chartreuseA's been the hard one, that 1/4 of a key offset is a bit hard to overcome years of muscle memory. Probably similar to going to an ortholinear board00:09
- wagga (QUIT: Ping timeout: 246 seconds) (~wagga@node-1w7jra22ildhv2z6kvjy41v6r.ipv6.telus.net)00:10
technomancyyeah but at least an ortho board follows the direction of your fingers00:10
chartreuseZ hasn't been quite as bad, though yeah the non-standard layout is a bit of work. The key to the left of Z isn't terrible as ISO layout keyboards have a key there and I've used a few laptops with that before00:10
technomancyI think the bottom row stagger might be my least favorite feature of this machine00:11
mntmnhm!00:12
technomancyI guess that sounds worse than it really is00:12
technomancybecause I love everything else about it, haha00:12
mntmnwell, one could try to make a more traditional keyboard, but it would require more keyshapes... at least one more i think00:12
technomancywell, more traditional isn't really what I personally want. =)00:13
mntmni can say i myself am a touch typist and i totally got used to it, but obvs i am at an advantage in terms of how much time i had to adapt to it00:13
mntmnalso i use our standalone usb keyboard on my desktop machine in the office, so i don't really have any more traditional keyboards around...00:14
technomancybut if you're going to make the bottom row be 1/4u off of a conventional layout, you might as well put it directly below the middle row and have no offset at all00:14
mntmnhm!00:14
mntmnyou mean Z under A?00:14
technomancyin either case you're 1/4u away from what people expect, and one direction has lots of stagger and the other is straight for your fingers00:14
technomancyyeah00:14
mntmninteresting00:14
mntmnthat wouldn't be too hard to prototype, but idk how that feels. 00:15
mntmni did this in part because the SX-64 did it00:15
mntmn(maybe the plus 4 too?)00:15
mntmnand nobody ever complained about it00:15
technomancywell, I probably would have, haha00:15
technomancyACTION is annoying like that00:15
mntmnhere: https://www.nightfallcrew.com/wp-content/gallery/commodore-sx-64-keyboard-repair-cleaning/20181209_125925.jpg00:16
technomancynot sure you can trust the judgement whoever made this; it has a caps lock key =)00:17
+ wagga (~wagga@node-1w7jra22ildhv9tkri23jpmvy.ipv6.telus.net)00:17
chartreuseAt that point maybe just go with an ortholinear00:17
chartreuseWhich someone is already making00:17
technomancychartreuse: I mean, yes, but I didn't want to push too hard on that =) I understand there are already so many hurdles for people who are considering buying a reform.00:18
technomancyone other consideration; do other folks find the 1u keys right above the trackball easy to hit? I feel like the metal frame gets in the way when I try to hit them with a straight thumb.00:19
chartreuseI find them a little hard to hit, both the spacebar and alt, but I've adjusted my hand resting position to not lay so flat against the laptop. I think the spacebar and alt could benefit with some convex caps on it00:21
technomancyit's funny; the 1.5u keys I have no trouble with. maybe because I have to bend my thumbs to hit them anyway.00:22
chartreuseI've only got a FDM printer so I'd be a bit worried printing my own and having the small mounts break off, but might be worth a test00:22
technomancyI'm kinda tempted to just remove the outer frame00:22
chartreuseI feel not having it would allow way more dirt into the case than already happens00:23
technomancybut it's so easy to get it out again, haha00:24
chartreuseI'm thinking of making some blocking pieces to stop dirt from going down into the bottom, as I have a dog and hair tends to get in00:24
chartreuseTrue00:24
chartreuseThough it's very visible on the acrylic what with the bright white leds under00:24
mntmni am also thinking about redesigning the frame00:24
mntmni would like the part between alt/space and trackball to be lower/deeper and not be such a barrier there. but this works only with the trackball, not with the trackpad.00:25
mntmnso it could be an alternative frame.00:25
technomancyoh yeah, that makes sense00:25
chartreusePerhaps if you add a depression about the trackball, tapering from the sides of the spacebars00:25
mntmnso, this i def. understand00:25
mntmnyeah, something like that00:26
technomancyalso I want to emphasize that I'm nit-picking and this is the best machine I've used by a significant margin =)00:26
technomancyand I love that we can discuss potential improvements00:26
chartreuseOrdered some 1.5mm chrome steel ball bearings from China, so I'll probably try that trackball mod out. Right now it sometimes sticks when scrolling upward, so more smoothness would be nice00:27
chartreuseI do like the accuracy of it though, seems to be very responsive00:27
mntmnchartreuse: cool, looking forward to your experience00:27
mntmnyes the sensor is really really good00:27
mntmntechnomancy: haha ok! i also appreciate this honest feedback, it is good to know where pain points are.00:28
chartreuseI imagine there'll be some differences in the mod since the person who did it before had the trackball with the SLA printed shell but I have a FDM shell.00:28
chartreuseWhich is fine, I could even print my own replacements for it if I mess up00:28
mntmnchartreuse: ah, i see. in general i think the FDM shell is actually better00:28
mntmnwith the SLA the ball gets stuck more00:29
chartreuseIs the FDM shell printed in PLA or ABS or something else?00:29
mntmnPLA00:29
chartreuseI'm really only set up to do PLA so that's perfect. I can see about modifying it to take the bearing directly rather than drilling it00:29
chartreuseMaybe make it in some bright colour or such :P00:29
technomancyI've been rocking a kailh choc white switch on my trackball button for like a week now and it's great; highly recommended if you're looking for a mod to do00:30
mntmnchartreuse: yes, agreed00:30
mntmnchartreuse: i would also modify the model00:30
mntmntechnomancy: ah yeah cool00:30
chartreuseI quite like the browns on the trackball. Though on the keyboard they feel more like linears/reds to me than tactile00:30
- ephase (QUIT: Read error: Connection reset by peer) (~ephase@2a01:e0a:168:1211::885)00:31
chartreuseI guess even on the trackball they do as well, I was honestly expecting more tactility. But I quite like linear switches as well, my desktop keyboard uses Cherry Red's00:31
mntmnwe will probably do more switch variations on keyboards once the standalone keyboard takes off00:32
mntmnright now there's not enough budget to make too many versions00:32
chartreuseAnd it's nice in that it's not too loud, so I wouldn't really be disturbing anyone that much with heavy trying in a public quiet space00:32
technomancyglad to hear it. the whites are amazing but I understand the logistical difficulties.00:32
mntmnhaha yes that was a consideration as well00:32
mntmnyeah i like the whites too00:32
chartreuseOh no worries, I understand that financials are probably tight with this project. Especially if the chip shortage starts effecting future boards00:33
technomancyI know from experience that the more options you have the more things that can go wrong. I'm impressed just getting blank caps was offered.00:33
mntmnyeah, all about this project is extremely tight00:33
mntmnwe even wanted to do an ortholinear keyboard option in the beginning. was scrapped because of complexity00:34
technomancysad but understandable00:34
chartreuseI'm just impressed that the kit could be made with all these custom boards and milled aluminum and fit in the budget. 00:34
technomancyplus like ... that's the whole point that you can replace it later!00:34
mntmnyeah!00:34
chartreuseI'm just wanting to get somewhat comforatble with how it is right now before diving into modding00:35
mntmnmakes perfect sense00:35
technomancymntmn: what's the relative scale of the reform 1 sales to reform 2? did you have a campaign for the first one?00:35
mntmnhehe00:35
mntmn10 vs 45000:36
chartreuseThere was a few beta units sold directly on the website. I was tempted but decided it'd be better if I waited00:36
mntmnah wait sales not really, we sold a bit more than 300 yet i think00:36
technomancyhaha wow00:36
mntmnyeah i think 13 beta units of 2 were built00:36
mntmnwe have/had inventory for ~450 units of reform 2.00:36
chartreuseThough those had the slower processor in them00:36
mntmnthe betas had the same cpu00:37
mntmnwe had basically 3 runs. 10 reform 1.0 which was totally different with imx6, 13 reform 2.0 beta, very similar to the final one00:37
chartreuseOh I must have been thinking about an earlier one, maybe alphas? There were two different cpu options, and I think it was the imx600:37
mntmnyes, we call them 1.0 internally, the imx6 one00:37
mntmnimx6qp00:37
chartreuseAh okay, yeah those were the ones I saw first, and had to wait a year for the crowdsupply to finally start :)00:38
mntmnyeah ^^ the prep took forever00:38
chartreuseGlad I waited, this 2.0 version is much more polished00:38
chartreuseThe speakers also sound great, though a downside is they're not very loud and can clip/vibrate quite easily near and above 0db volume (79%)00:41
chartreuseMight look into what options I could fit into the screen area00:41
mntmnyeah... another options would be to put bigger speakers in the lower case00:43
mntmnoption00:43
mntmnthe 1.0 didn't have any speakers ^^00:44
technomancyhonestly I respect that00:45
technomancyjust like the microphone; if you need it, you use a headset00:45
chartreuseYeah, I'm tempted to add a "subwoofer" to the base.00:48
chartreuseTrue, but I like to have some videos or music playing with the laptop sitting around at home, yeah I've got an external speaker I can connect it to, but sometimes I'm just lazy in bed or such00:48
swivelthe small Creative Pebble usb-powered speakers have impressed me for what they area, I tend to use them more than my proper stereo and they're cheap+compact enough to leave laying around on a counter or night stand, no internal laptop speakres would ever compare00:52
swivel$19.99 right now apparently https://us.creative.com/p/speakers/creative-pebble00:54
chartreuseI'm also impressed with the batteries. Seems to be fairly good battery life even with the screen at full brightness, and charges super fast00:58
chartreuseIt's not super long compared with some modern laptops at the moment but still quite good. Right now I'm drawing 0.3 so up to 6hr at the moment. Probably some optimizations with the nvme ssd I could do and other such01:00
technomancyit's a step up from my thinkpad x30101:01
- chartreuse (QUIT: Ping timeout: 258 seconds) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)01:18
- darth-cheney (QUIT: Remote host closed the connection) (~user@2603-7000-8d00-1f72-0000-0000-0000-1c80.res6.spectrum.com)01:29
- mjw (QUIT: Quit: Leaving) (~mark@herd.wildebeest.org)02:04
bluerise[*]-Video Link 0probe video device failed, ret -3802:34
bluerise [0] display-controller@32e00000, video02:34
bluerise [1] mipi-dsi@30a00000, dsi_host02:34
bluerise [2] sn65dsi86@2c, video_bridge02:34
bluerise [3] panel, panel02:34
blueriseslooowly02:34
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)03:32
chartreuseDid a tiny mod. Took some rubylith tape I had and covered all the leds on the mainboard. Gives a much nicer deep red glow and not so bright03:45
- chartreuse (QUIT: Ping timeout: 272 seconds) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:03
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:03
- chartreuse (QUIT: Client Quit) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:07
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:08
- chartreuse (QUIT: Client Quit) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:09
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:10
- chartreuse (QUIT: Client Quit) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:12
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)05:15
jackhillchartreuse: neat, that's a clever idea, I might try it.05:21
jackhillthanks for sharing05:22
chartreuseRubylith tape is probably a bit expensive, but really any deep tinted tape would help to cut down the leds05:22
chartreuseI had it because I was using it to filter some red led strips to work as a darkroom safelight05:22
jackhillchartreuse: yeah, I'm thinking of trying for a nice green anyway.05:26
jackhillI'm not a sticker person, but would like to personalize my reform a little too05:27
chartreuseIt's an easy way without desoldering the leds and changing the resitors since they're tiny 0603 parts05:28
jackhillyeah :)05:29
ex-parrotA thing I still have been too lazy to work out is whether the red “charging” LED is intended to go out at any point 06:07
ex-parrotI always wanted to get some real rubylith, interesting to hear it still exists 06:07
chartreuseI think it's just always on while a charger is connected. It doesn't go off when the display reads 0A06:09
chartreusePresumably when fully charged the laptop is running off the external supply instead of the batteries as the current meter is showing 0.00A06:10
chartreuseYou can still get the sheets of rubylith, and 3M makes ruby tape for doing litho masks and such06:10
chartreuseI got my roll of the tape from Digikey06:10
ex-parrotNeat 06:53
ex-parrotYeah I observed the 0 amps charging current and I figured it must be “done”06:53
ex-parrotI kind of like the malevolent underglow06:53
- chartreuse (QUIT: Ping timeout: 258 seconds) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)07:48
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)07:57
+ chartreu1e (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)07:59
ex-parrotAnyone have a pointer to any recent OpenBSD porting status?08:13
ex-parrotlooks like bluerise is the person to ask08:16
- chartreuse (QUIT: Quit: leaving) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)08:45
- chartreu1e (QUIT: Quit: leaving) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)08:45
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)08:46
- chartreuse (QUIT: Remote host closed the connection) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)09:33
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)09:33
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- kklimonda (QUIT: Ping timeout: 245 seconds) (sid72883@user/kklimonda)11:45
+ kklimonda (sid72883@user/kklimonda)11:46
- ex-parrot (QUIT: Ping timeout: 245 seconds) (~fincham@user/ex-parrot)11:48
+ ex-parrot (~fincham@user/ex-parrot)11:48
- verx_ (QUIT: Read error: Connection reset by peer) (~verx@asm.16bit.dev)11:49
- ggoes (QUIT: Ping timeout: 256 seconds) (~gregf@fsf/staff/ggoes)11:49
+ verx (~verx@asm.16bit.dev)11:50
- jnerula (QUIT: Ping timeout: 272 seconds) (~jnerula@li1009-93.members.linode.com)11:53
- mntmn (QUIT: Ping timeout: 252 seconds) (~mntirc@softboy.mntmn.com)11:58
- blast007 (QUIT: Remote host closed the connection) (~blast@user/blast007)12:00
- frank2 (QUIT: Ping timeout: 256 seconds) (~frank@91.229.143.153)12:00
+ frank2 (~frank@91.229.143.153)12:01
+ blast007 (~blast@user/blast007)12:05
+ mntmn (~mntirc@softboy.mntmn.com)12:05
- frank2 (QUIT: Ping timeout: 256 seconds) (~frank@91.229.143.153)12:06
+ frank2 (~frank@91.229.143.153)12:06
+ jnerula (~jnerula@li1009-93.members.linode.com)12:08
+ ggoes (~gregf@fsf/staff/ggoes)12:11
blueriseex-parrot: sup13:15
+ erlehmann (~erle@dynamic-046-114-034-077.46.114.pool.telefonica.de)13:23
- adjtm (QUIT: Read error: Connection reset by peer) (~adjtm@13.red-88-1-141.dynamicip.rima-tde.net)14:24
+ adjtm (~adjtm@13.red-88-1-141.dynamicip.rima-tde.net)14:26
mntmnbluerise: that log output was openbsd?15:14
- qbit (QUIT: Quit: WeeChat 3.2) (~qbit@foof.suah.dev)15:58
+ qbit (~qbit@foof.suah.dev)16:20
+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)16:53
- Kooda (QUIT: Ping timeout: 276 seconds) (~kooda@natsu.upyum.com)17:10
bluerisemntmn: u-boot17:32
blueriseu-boot mainline + patches17:33
bluerisestill not there yet17:33
bluerisehdmi would be easier, but the output pipeline for the reform + boundary devices code doesn't work easily17:33
mntmnah! how is it going?17:33
blueriseso I'm debugging as I go17:33
mntmninternal display is 10x more interesting though!!17:33
blueriseyeah, fuck HDMI ;)17:34
bluerisenw_dsi_imx mipi-dsi-bridge: failed to enable mipi dsi host17:34
blueriseimx8m_dcss display-controller@32e00000: fail to set backlight17:34
bluerisedevice_probe:59017:34
bluerisedevice_probe:611: failed display-controller@32e0000017:34
blueriseprobe video device failed, ret -2217:35
bluerisethat's where I'm currently at17:35
bluerisegetting closer and closer17:35
bluerisemntmn: how many lanes to the sn65dsi86? 4 lanes?17:40
blueriseyes yes, I can probably check in kicad...17:40
bluerisepatrick@lx2k:~$ doas pkg_add kicad17:41
mntmnbluerise: why does backlight fail?17:45
mntmnbluerise: that should be just 1 pwm output + 1 enable gpio17:46
mntmnbluerise: 4 DSI lanes.17:46
bluerisebecause the code that does the backlight seems to also turn DSI host on17:46
blueriselayers of layers of bullcrap ;)17:47
mntmnah.17:47
blueriseso it thinks backlight on failed, but it was something else17:47
mntmnoof17:47
bluerisedevice_probe:611: failed usb_kbd17:48
bluerisealso that17:48
+ alex4nder (~alexander@74.51.16.139)17:49
mntmnbluerise: eek17:49
mntmni remember i could not get usbkbd to work in u-boot but it worked in RISCOS ;)17:50
mntmnand in genode of course17:50
- alex4nder (QUIT: Ping timeout: 240 seconds) (~alexander@74.51.16.139)17:53
+ alex4nder (~alexander@74.51.16.139)17:54
+ Kooda (~kooda@natsu.upyum.com)18:03
bluerisenow it hangs somewhere, maybe the PWM stuff18:05
bluerisebecause the u-boot imx driver is not really built with clock device model in mind, lala18:06
- alex4nder (QUIT: Ping timeout: 250 seconds) (~alexander@74.51.16.139)18:06
+ alex4nder (~alexander@172.56.42.189)18:08
blueriseah yeah18:09
mntmnFYI everyone whose speakers are too quiet: https://community.mnt.re/t/speakers-too-quiet-try-this/37518:10
blueriseah nice18:11
bluerisepanel is on18:11
blueriseI mean, backlight18:11
mntmnbluerise: yeah!!18:12
blueriseok, let's try to add that stuff from theat community thread18:12
blueriselooks like I have link to the panel?18:31
bluerisebut I don't see a color bar18:31
blueriseI think I found the knob for usb...18:33
blueriseok, USB keyboard works18:36
bluerisenice18:36
bluerise+       "stdin=serial,usbkbd\0" \18:36
bluerisethis helps.18:36
bluerisemntmn: didn't you say there's a know that changed where mipi sources stuff from?18:37
mntmnbluerise: yes18:41
mntmnbluerise: but you don't need that for color bars18:41
mntmni think. did you give the "run" or something command after enabling the color bars?18:42
blueriseyeah18:44
mntmnmux-reg-masks = <0x34 0x00000004>; /* MIPI_MUX_SEL */18:47
mntmnreg = <0x30340000 0x10000>;18:47
mntmnso that should be 0x3034003418:47
mntmnah yeah that is in the manual under 8.2.4.14 GPR13 General Purpose Register (IOMUXC_GPR_GPR13)18:48
mntmna bit hidden.18:48
mntmnit's bit 2 in that register18:49
mntmnbluerise: bit 2 set (1) means DCSS, bit 2 unset (0) means LCDIF18:50
- rasmus (PART: Disconnected: timeout during receiving) (~rasmus@c80-217-132-63.bredband.tele2.se)18:53
bluerise                                clock-frequency = <162000000>;18:53
bluerise                                hactive = <1920>;18:53
bluerise                                vactive = <1080>;18:53
bluerise                                hback-porch = <40>;18:53
bluerise                                hfront-porch = <40>;18:53
bluerise                                vback-porch = <4>;18:53
bluerise                                vfront-porch = <4>;18:53
bluerise                                hsync-len = <80>;18:53
bluerise                                vsync-len = <24>;18:54
bluerisethat correct for the panel?18:54
bluerisemostly concerend about hsync/vsync-len18:54
+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)18:54
bluerisefront/back porch seem to be right (compared to the i2c commands that were in the forum thread)18:54
bluerise"Using DCSS as input source18:54
bluerisemux should be set correctly, ok18:55
mntmnone second18:55
mntmn+static const struct drm_display_mode innolux_n125hce_gn1_mode = {18:55
mntmn+.clock = 162000,18:55
mntmn+.hdisplay = 1920,18:55
mntmn+.hsync_start = 1920 + 40,18:56
mntmn+.hsync_end = 1920 + 40 + 40,18:56
mntmn+.htotal = 1920 + 40 + 40 + 80,18:56
mntmn+.vdisplay = 1080,18:56
mntmn+.vsync_start = 1080 + 4,18:56
mntmn+.vsync_end = 1080 + 4 + 4,18:56
mntmn+.vtotal = 1080 + 4 + 4 + 24,18:56
mntmn+};18:56
blueriseyup. so that htotal/vtotal thing is active + back + front + len?18:56
mntmni would think so yes18:57
mntmndo you get a DP link to the display?18:57
blueriseyeah, I think so19:00
blueriseotherwise I'd see an error message like I did before, heh19:00
mntmnhm yeah19:00
blueriseanything special like hsync/vsync active high/low?19:01
mntmnthere is a weird hack about that in the nwl-dsi driver, one moment19:01
blueriseah19:03
bluerisereform2-imx8mq/template-kernel/patches/0001-nwl-dsi-fixup-mode-only-for-LCDIF-input-not-DCSS.patch19:03
bluerisethat?19:03
mntmnyeah, the linux nwl-dsi driver by default inverts hsync/vsync19:03
mntmnand i had to turn that hack off for it to work with dcss19:04
mntmni don't know if the u-boot driver also has this hack19:04
bluerise        /*19:04
bluerise         * Adjusting input polarity based on the video mode results in19:04
bluerise         * a black screen so always pick active low:19:04
bluerise         * (and polarity active high in LCDIF)19:04
bluerise         */19:04
bluerise        nwl_dsi_write(dsi, NWL_DSI_VSYNC_POLARITY,19:04
bluerise                      NWL_DSI_VSYNC_POLARITY_ACTIVE_LOW);19:04
bluerise        /*19:04
bluerise         * Our dsi-rgb converter needs 0 regardless of input polarity19:04
bluerise         */19:04
bluerise        nwl_dsi_write(dsi, NWL_DSI_HSYNC_POLARITY,19:04
mntmntehe19:04
bluerise                      NWL_DSI_HSYNC_POLARITY_ACTIVE_LOW);19:04
mntmnwell.19:05
mntmnyou could try turning that around, i lost track of who likes the polarity how19:06
mntmni'd say try active high19:06
mntmnfor both19:06
bluerisewill try. thought active low is the default19:06
mntmnok19:07
mntmnah yeah active low is probably right19:07
bluerisehmhmhm19:11
blueriseI'm surprised the color bars don't work19:11
mntmnyeah, strange. is your pixel clock working?19:11
bluerisehow would I know?19:12
mntmnhaha. good Q. but actually not a lot of input to the converter chip should be needed to get the bars to appear19:13
mntmnmostly display timing, edp pll lock, and run19:14
bluerise 25000000             1        |   `-- video_pll1_ref_sel19:15
bluerise 5000000              0        |       |-- video_pll1_ref_div19:15
bluerise 650000000            0        |       |   `-- video_pll119:15
blueriseseems a bit off, didn't you want that at 594?19:15
bluerise 25000000             0        |               |-- dc_pixel19:16
bluerise 25000000             2        |               `-- dsi_phy_ref19:16
mntmnyes           video_pll1                  1        1        0   593999998          0     0  50000         Y19:16
blueriseget_pixclock: 648000000 = 162000000 * 419:17
blueriseEnabled core clk @266666666 Hz19:17
blueriseEnabled tx_esc clk @20000000 Hz19:17
blueriseclock = 162000000 kHz19:17
bluerisekHz? :D19:17
bluerisemaybe the print is wrong19:17
mntmnhaha19:17
mntmn162 ghz...19:17
mntmn                video_pll1_out        3        3        0   593999998          0     0  50000         Y19:18
mntmn                   dsi_phy_ref        1        1        0    23760000          0     0  50000         Y19:18
mntmn                   lcdif_pixel        1        1        0   593999998          0     0  50000         Y19:18
mntmn                   dc_pixel           1        1        0   118800000          0     0  50000         Y19:18
bluerisedoes lcdif need to be the same for dcss?19:18
bluerise/ LCDIF is not used, but has to be active or DCSS won't work19:18
bluerisehmhm19:19
mntmnoh yeah!19:19
mntmnthere was some weirdness that lcdif cannot be powered down i think19:19
mntmnmaybe same power domain or something weird19:19
mntmnbluerise: oh yeah i remember why my numbers are off.19:23
mntmnbluerise: because i throttle the pixel clock with a factor to work around some DSI glitch. this shouldn't affect you though 19:24
mntmnbluerise: i do clk_set_rate(dcss->pix_clk, (vm->pixelclock * 700)/1000);19:26
mntmnbluerise: but you don't need to do that.19:26
mntmnbluerise: so if you type in these i2c commands, it doesn't work? https://community.mnt.re/t/u-boot-and-internal-screen/295/1019:29
blueriseI'm doing these programmatically already19:29
mntmnand you're doing the same stuff, and you got pll confirmation and link training confirmation?19:30
mntmnyou can probably get some more status information out of the converter and the display19:31
blueriseoh19:32
bluerisenow I see colours19:32
mntmnha!19:32
mntmnhow?19:32
blueriseI typed them in manually again19:32
mntmnaha!19:32
mntmnmaybe some delays are missing in the code or something?19:33
mntmnor it is done too early?19:33
bluerisewell at what point should it be initialized?19:34
blueriselast?19:34
mntmnhmm yeah.19:35
bluerisemaybe it lost link inbetween19:38
bluerisevery weird19:38
mntmnbut now you know it almost works!19:39
bluerisenot sure, if I disable colour bars, it's still black ;)19:40
mntmnwell, what else should be there? do you have anything in the framebuffer?19:41
blueriseah, probably need a delay there, 1s19:42
bluerisethere should be u-boot printfs19:42
mntmncan you monitor somehow that dcss is still runnin? i.e. its IRQ19:43
bluerise If19:43
mntmnit has this kick/load irq that needs to run every frame19:43
bluerise         * the panel isn't ready quite it might respond NAK here which means19:43
bluerise         * we need to try again.19:43
blueriseahhh.19:43
mntmn:O19:43
bluerisehuh, really?19:44
mntmnreally what?19:45
mntmnabout the irq? yes19:45
mntmnthe engine works like that, an irq is fired every frame and it triggers the loading of the next frame19:45
mntmnit's called context loader i think19:45
blueriseok, now I can reproducibly turn it on19:50
mntmnthat's good!19:50
mntmndo you have a repo with this state somewhere?19:50
bluerisegithub.com/bluerise/u-boot branch mntre-disp219:53
blueriseI need to clean up the last 5-10 commits19:53
blueriselots of debugging19:53
mntmnthat's fine19:55
bluerisecleaning that up isn't hard, I just want something working...19:56
blueriseand I'm trying to have reasonable cherry-pick + some fixes and 'okayish' commits on top19:56
blueriseanyway, with that I get colour bars19:56
mntmnyes, cool19:59
mntmndumb question but you have stdout=vga,serial yeah?19:59
bluerisestdout=serial,vidconsole20:00
bluerisehm, let me try vga then?20:00
mntmnhmm i had to use vga with hdmi20:00
mntmnwhich is also dcss20:00
mntmncan you printf the framebuffer address?20:01
mntmnthen you could read and write pixels with memory commands20:01
bluerisevga is legacy btw20:03
bluerise          This is a work-around for boards which have 'lcd' or 'vga' in their20:03
bluerise          stdout environment variable, but have moved to use driver model for20:03
bluerise          video. In this case the console will no-longer work. While it is20:03
bluerise          possible to update the environment, the breakage may be confusing for20:03
bluerise          users. This option will be removed around the end of 2020.20:03
mntmnyeah20:07
bluerisehm, nothing shows20:09
blueriseand u-boot is definitely using the framebuffer20:10
mntmndo you have the address?20:14
mntmnok20:14
blueriseyes20:15
bluerisewriting three changes nothing20:15
bluerisebut when I type something in u-boot, it gets overwritten back20:15
blueriseso scrolling seems to work ;)20:16
mntmnnice20:17
mntmncan you confirm that bit 2 is set in 0x30340034 ?20:17
mntmnvia md20:17
mntmnalso, hsync/vsync still active low? ;)20:18
mntmnand next thing i would check if dcss's interrupt is running...20:18
bluerisethere's no interrupt in u-boot20:19
blueriseu-boot=> md.l 0x30340034 1    20:19
bluerise30340034: 00000004                             ....20:19
mntmnok, that's good... but how can dcss work without an interrupt20:20
mntmnlet me check the driver20:20
mntmnhm no first i should check if there's any status info available in sn65dsi86 about the validity of the mipi dsi input20:22
mntmnbluerise: error registers 0xf0, 0xf1 look valuable20:24
mntmnactually 0xf0-0xf820:25
blueriseu-boot=> i2c md 2c f0 820:25
bluerise00f0: 00 00 00 00 41 02 00 01    ....A...20:25
mntmnok lets see20:25
bluerisehmu-boot=> i2c md 2c f0 920:26
bluerise00f0: 00 00 00 00 41 02 00 01 03    ....A....20:26
blueriseforgot f8 in the last one20:26
mntmnah yeah20:26
mntmn0xf4 is irrelevant i think, aux channel stuff20:27
mntmn0x2 in 0xf5 says HPD_INSERTION20:27
mntmnso, display is plugged in ;)20:27
mntmn0x1 in 0xf7 says DPTL_DATA_UNDERRUN_ERR20:28
mntmn>  This field is set whenever no data was received when data should20:28
mntmnhave been ready20:28
mntmn03 in 0xf8 shouldn't be possible, it means both LT_FAIL and LT_PASS20:29
mntmnbut that's about display link training20:29
mntmni think the main interesting bit here is that you don't seem to be getting MIPI DSI packets.20:29
blueriseDP sounds like display port20:29
mntmnhmm no i don't think so20:30
mntmnDPTL is not explained but there is for example > DPTL_UNEXPECTED_DATA_ERR. This field is set whenever a data token at in the video stream from20:30
mntmnDSI was found at an invalid time syntactically.20:30
mntmnso, this is about DSI20:30
mntmnwe should check if mixel dphy has any status things20:31
mntmnbluerise: dphy is on yes?20:32
- alex4nder (QUIT: Ping timeout: 256 seconds) (~alexander@172.56.42.189)20:35
blueriseich hab ne bloede Idee20:39
mntmnbluerise: i would maybe check if nwl_dsi_host_transfer is called20:39
bluerisemaybe it's the lcdif clock that isn't running20:39
mntmnhmm yeah!20:39
bluerisebecause I'm using dcss and there's no driver attaching to lcdif20:40
bluerisepatching the dcss block to also reference the lcdif clock20:40
blueriseah nah, it's there, but maybe not assigned, let's try20:40
mntmnbluerise: are you getting all those debug prints from dphy and nwl-dsi?20:44
- rasmus (PART: Disconnected: timeout during receiving) (~rasmus@c80-217-132-63.bredband.tele2.se)20:53
+ rasmus (~rasmus@c80-217-132-63.bredband.tele2.se)20:54
bluerise 650000000            0        |                       |-- dc_pixel21:05
bluerise 650000000            2        |                       |-- lcdif_pixel21:05
bluerise 40625000             2        |                       `-- dsi_phy_ref21:05
bluerisehmm21:05
bluerise                   dsi_phy_ref        1        1        0    23760000          0     0  50000         Y21:05
bluerise                   lcdif_pixel        1        1        0   593999998          0     0  50000         Y21:06
bluerise                   dc_pixel           1        1        0   118800000          0     0  50000         Y21:06
bluerisesurprising diff21:06
bluerisehow's your dc pixel only at 118?21:07
bluerisedrivers/video/imx/nwl-drv.c:                    clk_set_rate(dsi->phy_ref_clk, rate);21:09
blueriseit's also weird that it sets a rate21:09
mntmnbluerise: i told you a while ago. i multiply it by 0.7x. but you don't need to do that21:12
mntmnbluerise: it's only a workaround for an image wrap glitch (underrun) that happens from time to time with dsi21:12
blueriseyeah, then it should still be at 166 or so21:12
bluerisenot 40021:12
mntmni meant the dc_pixel clock21:13
mntmnthat's why it is 118 and not 16221:13
mntmnbut your phy ref is 40.625mhz instead of 23.7621:14
mntmnnot sure if that's good?21:14
blueriseprobably not21:17
mntmnoh btw i think dcss needs another phy ref clk depending on hdmi / mipi21:19
- XgF (QUIT: Remote host closed the connection) (~quassel@2001:19f0:5001:1174:c87c:b331:3fed:5187)21:22
mntmnbluerise: are you using IMX8MQ_CLK_DC_PIXEL also for the dcss pix clock? because you have to21:22
mntmnbluerise: whereas HDMI uses IMX8MQ_VIDEO2_PLL_OUT for the dcss pix clock21:22
mntmnbluerise: and the parent of IMX8MQ_CLK_DC_PIXEL has to be IMX8MQ_VIDEO_PLL1_OUT21:23
+ XgF (~quassel@2001:19f0:5001:1174:dbf:47a1:9a3f:787d)21:23
mntmnbluerise: IMX8MQ_CLK_DC_PIXEL rate should be 59400000021:24
mntmnbluerise: ok i see what you mean now21:24
bluerisebut yours is 118 (which is 166, the panel pixelclock, * 0.7)21:26
mntmnyeah, it is probably wrong in my dts21:26
mntmnand then gets overwritten by the driver21:26
mntmnbluerise: anyway, can you confirm the input clock for your dcss is dc_pixel? 21:26
mntmnmaybe not and that's why it is left at the default21:27
mntmnsorry i mean not input clock, but "pix" clock.21:27
blueriseyes, it is21:29
mntmnah yeah i see now in your dts21:29
mntmnwhat if you change the 594000000 in your dts to 162000000 ?21:30
mntmnmaybe the u-boot dcss driver doesn't configure the pixel clock?21:30
mntmnyeah it doesn't21:31
mntmn__weak int imx8m_dcss_clock_init(u32 pixclk)21:32
mntmn{21:32
mntmnreturn 0;21:32
mntmn}21:32
mntmnthat's kinda weird?21:32
mntmnbut how did it work with hdmi...21:33
blueriseit's implemented here arch/arm/mach-imx/imx8m/clock_imx8mq.c21:35
bluerisein their repo21:35
mntmnah21:36
mntmnbut who sets the rate21:36
mntmnonly the dts?21:36
mntmnmaybe the hdmi driver21:36
ex-parrotmorning bluerise. I have nothing useful to add currently other than to register my interest in OpenBSD on the reform also 21:37
mntmnbluerise: hey uhm nwl_dsi_bridge_mode_fixup exists in the driver in your u-boot repo?21:37
ex-parrotACTION -> to the office 21:38
mntmnah ok weird that sets the sync flags active low in case of dcss21:38
mntmnbut that also sets the "crtc_clock"21:39
mntmn"Update the crtc_clock to be used by display controller"21:39
bluerise 25000000             1        |   `-- video_pll1_ref_sel21:43
bluerise 5000000              1        |       `-- video_pll1_ref_div21:43
bluerise 650000000            1        |           `-- video_pll121:44
bluerise 650000000            1        |               `-- video_pll1_bypass21:44
bluerise 650000000            4        |                   `-- video_pll1_out21:44
bluerise 162500000            0        |                       |-- dc_pixel21:44
bluerise 650000000            2        |                       |-- lcdif_pixel21:44
bluerise 24074075             2        |                       `-- dsi_phy_ref21:44
bluerisethat looks better, right?21:44
mntmnyes, what did you do?21:49
bluerisechanged the dcss driver so set its clock21:50
mntmnbut21:50
mntmnnwl-drv.c:354, in nwl_dsi_bridge_mode_fixup()21:51
mntmnit sets some clock there21:51
blueriseyeah, but not the dc_pixel21:52
mntmni'm trying to understand what crtc_clock is21:54
mntmnalso, i'm trying to understand your dts node for mipi_dsi21:54
+ alex4nder (~alexander@172.56.42.59)21:55
mntmnis mipi_dsi_bridge the dphy? it doesn't exist in linux21:55
mntmnah it is video/imx/nw_dsi_imx.c21:56
mntmnah that is the weird glue code to panel and backlight21:57
mntmnok21:57
mntmnthe field crtc_clock of mode_config struct is never set anywhere22:02
+ chartreuse (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)22:03
mntmnbluerise: what is the number in the second column of your clock dump?22:03
mntmnbluerise: some kind of refcount maybe?22:03
blueriseyes22:03
mntmnso the one of dc_pixel is 0?22:04
mntmnis it ever enabled?22:05
bluerisesurprisingly though, because I do call                 clk_prepare_enable(priv->pix_clk);22:06
bluerisemight have been the dump I did before I added that22:06
mntmnok22:06
bluerise        /* DCSS clock selection */22:07
bluerise        reg32_write(priv->addr + 0x2f010, 0x1);22:07
bluerise        temp = reg32_read(priv->addr + 0x2f010);22:07
bluerisewonder which clock that is22:07
mntmnugh22:07
mntmnis that from the dcss driver?22:07
bluerise        if (blkctl->dcss->hdmi_output)22:08
bluerise                dcss_writel(0, blkctl->base_reg + DCSS_BLKCTL_CONTROL0);22:08
bluerise        else22:08
bluerise                dcss_writel(DISPMIX_PIXCLK_SEL,22:08
bluerise                            blkctl->base_reg + DCSS_BLKCTL_CONTROL0);22:08
bluerise        dcss_set(B_CLK_RESETN | APB_CLK_RESETN | P_CLK_RESETN | RTR_CLK_RESETN,22:08
bluerise                 blkctl->base_reg + DCSS_BLKCTL_RESET_CTRL);22:08
bluerisethat's linux22:08
mntmnah very interesting22:09
bluerise#define DCSS_BLKCTL_CONTROL0            0x1022:09
bluerise#define   DISPMIX_PIXCLK_SEL            BIT(8)22:09
bluerise#define   HDMI_MIPI_CLK_SEL             BIT(0)22:09
blueriseaha22:09
mntmnok that is the solution i think22:09
mntmnmy god what a convoluted design22:09
bluerisethere is no final solution22:09
mntmnso you wanna poke 0x100 there i guess22:09
mntmnwait what22:10
mntmnHDMI_MIPI ??22:10
mntmnlol22:10
mntmni hope that's just a wrong label22:11
mntmnthe manual is a bit different22:13
mntmn> 15.2.2.1.7 Control (CONTROL0_SET)22:13
mntmnwait that is offset 0x1422:13
mntmn> 15.2.2.1.6 Control (CONTROL0)22:14
mntmn0x1022:14
bluerise_SET is the same as non-_SET, it just doesn't clear 0 bits22:14
mntmnbit 8: Pixel Clock source selection. 0x0 = Video PLL2 Clock22:14
mntmn0x1 = CCM DC Pixel Clock22:14
mntmnbluerise: yep, sorry22:14
mntmnbit 5:4: Reference clock source selection.22:15
mntmn0x0 = 27 MHz Oscillator Reference Clock22:15
mntmn0x1 = Video PLL2 Clock22:15
mntmn0x2 = CCM DC Pixel Clock22:15
bluerisehuh22:15
mntmnyeah interesting huh22:15
mntmnone sec...22:16
mntmnit is not touched in linux22:17
mntmnthey have an unused define for it22:17
mntmnsomeone had this question before ;) https://community.nxp.com/t5/i-MX-Processors/imx8m-non-cea-video-modes/m-p/798575/highlight/true22:18
chartreuseIs this for messing with the HDMI output? Or are you changing the screen or something? Missed the context of what's being done22:20
mntmnchartreuse: openbsd 22:21
mntmnchartreuse: or actually u-boot22:21
blueriseWell, actually22:21
chartreuseAh okay!22:21
blueriseU-Boot + LCD display22:21
mntmnyeah22:21
mntmnthe HDMI_MIPI_CLK_SEL (bit 0) is missing in the manual22:21
mntmnbut 0 is "MIPI clock source"22:21
blueriseis there no dcss driver in NXP's upstream linux git?22:22
blueriseI'd be surprised22:22
blueriseAlso,your Linux kernel is mainline?22:23
mntmnmainline plus patches22:23
mntmnthe dcss driver is not mainlined22:24
mntmni import it here https://source.mnt.re/reform/reform-system-image/-/blob/main/reform2-imx8mq/template-kernel/patches/mnt5000-imx8mq-import-HDMI-driver-and-make-DCSS-compatible.patch22:24
mntmnwait no it is mainlined22:24
mntmnbut i patched it a bit22:24
mntmni added hdmi support to it22:25
blueriseMaybe I forgot something in the SN65DSI86 setup?22:26
mntmnbluerise: so, no change after setting 0x2f010 to 0x100?22:28
blueriseno change22:29
+ ephase (~ephase@2a01:e0a:168:1211::885)22:29
ephaseHello22:29
chartreuseHi22:31
mntmnbluerise: can you confirm that priv->hpol and priv->vpol are false in dcss?22:31
mntmnalso it's a mystery to me that they can run dcss without the ctxld22:35
mntmnah maybe that is only required for double buffering / page flip stuff that is needed in linux22:37
bluerisebla 0 022:38
blueriseyes, hpol/vpol are false22:38
mntmnok thanks22:40
mntmni don't see where they turn the timing controller on in the dcss driver22:41
mntmnthat should be bit 8 (TC_GO) of dcss + 0x2000022:42
mntmnah i see22:43
mntmnhere lol 22:44
mntmn/* disable local alpha */22:44
mntmnreg32_write(priv->addr + 0x20000, 0xff005184);22:44
mntmnthere is the 0x10022:44
- rasmus (PART: Disconnected: closed) (~rasmus@c80-217-132-63.bredband.tele2.se)22:50
mntmnbluerise: i couldn't find any dcss status registers but mipi has a few we could check for activity22:53
mntmnMIPI_DSI_HOST_DSI_HOST_CFG_STATUS_OUT (0x30a0002c)22:55
mntmnthis should be zero if no errors22:55
mntmnMIPI_DSI_HOST_DSI_HOST_RX_ERROR_STATUS (0x30a00030)22:55
mntmnshould also be zero22:56
blueriseu-boot=> md.l 0x30a0002c 122:56
bluerise30a0002c: 00000000                             ....22:57
blueriseu-boot=> md.l 0x30a00030 122:57
bluerise30a00030: 00000000                             ....22:57
mntmncool22:59
mntmnMIPI_DSI_HOST_APB_PKT_IF_DSI_HOST_PKT_STATUS 0x30a0028c22:59
mntmnMIPI_DSI_HOST_APB_PKT_IF_DSI_HOST_PKT_FIFO_WR_LEVEL 0x30a0029022:59
mntmn(these should change over time i guess)23:01
mntmnwell, feierabend for me23:03
bluerisehm, both 023:04
mntmnhmm23:04
mntmnsounds like it's not transmitting then maybe?23:04
mntmni will check on a live device if those registers should be non-zero23:05
mntmnbluerise: red herring, they are also zero on a live system.23:08
- chartreuse (QUIT: Ping timeout: 258 seconds) (~chartreus@S0106f0f249dfd9c3.cg.shawcable.net)23:50
+ chartreuse (~chartreus@199-7-158-226.eng.wind.ca)23:57

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