2022-12-20.log

+ WoC` (WoC@2603-8080-cd40-00c6-04b5-ba26-a1c8-8ae4.res6.spectrum.com)00:51
- S0rin (QUIT: Ping timeout: 272 seconds) (~S0rin@user/s0rin)00:56
+ S0rin (~S0rin@user/s0rin)00:58
- xet7 (QUIT: Remote host closed the connection) (~xet7@user/xet7)03:19
+ xet7 (~xet7@user/xet7)03:21
+ shanshe (~shanshe@192.red-81-36-59.dynamicip.rima-tde.net)05:02
- shanshe_ (QUIT: Ping timeout: 272 seconds) (~shanshe@192.red-81-36-59.dynamicip.rima-tde.net)05:04
minutethe open fpga toolchain now supports kintex-7 and zynq!11:01
+ mnemotron (~mnemotron@194.135.47.239)11:45
- S0rin (QUIT: Ping timeout: 260 seconds) (~S0rin@user/s0rin)11:48
+ S0rin (~S0rin@user/s0rin)11:52
- S0rin (QUIT: Ping timeout: 268 seconds) (~S0rin@user/s0rin)12:43
+ S0rin (~S0rin@user/s0rin)12:46
- mnemotron (QUIT: Quit: Quit) (~mnemotron@194.135.47.239)13:19
- S0rin (QUIT: Ping timeout: 272 seconds) (~S0rin@user/s0rin)14:56
+ S0rin (~S0rin@user/s0rin)14:57
Claude\o/20:44
apolkosnik[m]Very nice21:10
+ mjg59 (~mjg59@irc.codon.org.uk)21:22
mjg59Hi! I'm trying to look at the serial output, but at 115200 I'm getting a fair amount of garbage with some recognisable strings - is there any chance the clocking might be off somehow?21:23
minutemjg59: wrong voltage of the adapter?21:24
mjg59Ooh yeah good point. What voltage is the UART?21:25
mjg59Oh. Alternatively it could be because the ground wire fell off.21:31
mjg59Yeah ok that looks much better21:34
mjg59Now to figure out why I can't access these registers...21:34
minutemjg59: which registers?22:49
mjg59minute: Any of them! Reading from the register base gives me stuff that doesn't correspond to anything the card should be providing, and writes don't do anything, so I'm assuming that my attempts to get Amiga Unix to map these addresses are so far not correct23:03
minutemjg59: ohh ok but the card works under amigaos, yeah?23:09
minutemjg59: i'm not sure how amiga unix boots... does it go through normal kickstart roms, i.e. autoconfig?23:10
minutei guess it must have a facility to list zorro cards and you already have a physical address of the board23:12
mjg59Yeah, it autoconfigs fine, and it also works in Z2 mode, but the kernel doesn't set up fixed mapping for Z3 memory and there's zero surviving documentation for this, so I'm left trying to reverse engineer stuff23:12
minuteoh wow ok23:13
mjg59I got to the point where it's not segfaulting on access, so that's progress, but now I need to figure out where those accesses are actually going23:13
minutethis would be easiest with xilinx jtag cable, vivado and some triggers; or logging all bus writes with uart prints (also requires vivado to build the thing)23:19
mjg59I'm "solving" it by hacking up UAE to instrument it instead23:24
minutemjg59: ah, you're emulating the whole thing to see to which addresses it writes?23:25
mjg59Yeah23:25
minutenice23:26

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